This invention relates to a method of manufacturing a semiconductor device and, in particular, to a method of manufacturing a semiconductor device which includes a gettering operation of removing heavy metal impurities unintentionally introduced into a silicon wafer in a semiconductor manufacturing process.
In a manufacturing process of a semiconductor device, a silicon wafer is often contaminated, for example, in an ion implanting step or an etching step in which heavy metal impurities may unintentionally be introduced onto a wafer device surface or into the interior of the silicon wafer. In the instant specification, the wafer device surface is intended to represent a principal surface of the silicon wafer which is adjacent to a device active region.
It is known that presence of such heavy metal impurities in the device active region will cause various problems, such as a low reliability of a gate insulator film of a MOS (Metal-Oxide-Semiconductor) transistor and a large junction leakage current. Particularly, in a DRAM (Dynamic Random Access Memory), an increase in junction leakage current due to the presence of the heavy metal impurities deteriorates refreshing characteristics. This results in a decrease in production yield and an increase in production cost. Therefore, in order to suppress the production cost, it is necessary to efficiently remove the heavy metal impurities without complicating the manufacturing process.
In order to remove the heavy metal impurities unintentionally introduced into the silicon wafer, a gettering technique is used. In the gettering technique, the heavy metal impurities are emitted from the device active region of the semiconductor device and captured in an inactive region which does not affect device characteristics.
As the gettering technique, various methods are known. As a method in which a gettering layer is formed on a wafer back surface opposite to the wafer device surface, following two methods are known.
A first method is a phosphorus diffusion method in which a high concentration of phosphorus is doped into the wafer back surface to capture the heavy metal impurities. In this method, a higher concentration of phosphorus generally provides a higher gettering ability.
A second method is a PBS (Polysilicon Back Sealing) method in which polysilicon is deposited on the wafer back surface. In the second method, the heavy metal impurities are captured in grain boundaries of polysilicon. A smaller grain size of polysilicon provides a greater effective gettering area so that a gettering operation is more efficiently performed.
In each of the first and the second methods mentioned above, heat treatment is performed so that the heavy metal impurities are heat-diffused from the device active region to the wafer back surface and captured in the gettering layer formed on the wafer back surface. As a consequence, the heavy metal impurities contained in the device active region adjacent to the wafer device surface are reduced. Therefore, the gettering effect greatly depends upon the temperature and the time of the heat treatment upon the gettering operation.
Generally, the gettering operation is performed by three steps. A first step is emission of the heavy metal impurities from the device active region. A second step is heat diffusion of the heavy metal impurities to the gettering layer. A third step is capture of the heavy metal impurities in the gettering layer.
In the first step, the emission of the heavy metal impurities occurs at the highest temperature of the heat treatment. Generally, the heavy metal impurities are efficiently emitted at a temperature not lower than 800xc2x0 C.
In the second step, the heavy metal impurities must be diffused to the wafer back surface where the gettering layer is present. Therefore, it is preferable to perform the heat treatment at a high temperature so that the diffusion length or distance of the heavy metal impurities is increased. For example, in case where the heat treatment is performed at 800xc2x0 C. for one hour, the diffusion length of an iron (Fe) atom (heavy metal impurity) in silicon is equal to 0.11 cm which approximately corresponds to twice the thickness (600 xcexcm) of the silicon wafer. Therefore, the heat diffusion assures that the heavy metal impurities reach the gettering layer on the wafer back surface. Thus, in the gettering operation, the heavy metal impurities can be efficiently removed by the heat treatment at a temperature not lower than 800xc2x0 C.
Referring to FIGS. 1, 2A and 2B, an existing method of producing a semiconductor device will be described.
Referring to FIG. 1, a semiconductor device comprises a silicon wafer 1 with a plurality of MOS transistors 27 formed in a device active region adjacent to a wafer device surface. Each of the MOS transistors 27 comprises a gate insulator film 4, a gate electrode 5, a source 6, and a drain 7. The MOS transistors 27 are isolated from one another by a device isolation oxide film 3.
Above the MOS transistors 27 and the device isolation oxide film 3, a polycide bit line 9 made of a polycide film is formed. Above the polycide bit line 9, a capacitor 28 is formed. The capacitor 28 comprises a capacitor lower electrode 11, a capacitor plate 13, and a capacitor nitride film 12 interposed between the capacitor lower electrode 11 and the capacitor plate 13. The MOS transistors 27, the polycide bit line 9, and the capacitor 28 are separated from one another by an interlayer insulator film 14.
The source 6 of each MOS transistor 27 is connected to the polycide bit line 9 through a bit contact 8 formed in the interlayer insulator film 14. The drain 7 of each MOS transistor 27 is connected to the capacitor lower electrode 11 through a capacitor contact 10 formed in the interlayer insulator film 14.
On the other hand, the silicon wafer 1 is provided with a gettering layer formed on a wafer back surface opposite to the wafer device surface. The gettering layer comprises a high-concentration phosphorus diffusion layer, a PBS layer, or the like. In FIG. 1, the device active region of the silicon wafer 1 contains heavy metal impurities 15 which have unintentionally been introduced in a preceding manufacturing step such as ion implantation.
In the semiconductor device having the above-mentioned structure, a gettering operation is carried out by a heat-treating step executed immediately before formation of a metal wiring layer, such as an aluminum (Al) wiring layer or a tungsten wiring layer, used as a circuit wiring.
In the heat-treating step, the semiconductor device is subjected to a heat treatment temperature of about 800xc2x0 C. so that the heavy metal impurities 15 present in the device active region of the silicon wafer 1 are emitted from the device active region (FIG. 2A). The heavy metal impurities 15 are diffused to and captured in the gettering layer 2 on the wafer back surface of the silicon wafer 1 (FIG. 2B). It is thus possible to remove the heavy metal impurities 15 which have been introduced into the silicon wafer 1 in the manufacturing step preceding the gettering operation and which are present in the device active region.
Generally, in manufacturing steps after the formation of the metal wiring layer made of a metal such as aluminum, the heat treatment temperature is limited to about 400xc2x0 C. or lower (otherwise, the metal such as aluminum is melted, resulting in deformation or short-circuiting). In this connection, re-emission or re-diffusion of the heavy metal impurities 15 out of the gettering layer 2 hardly occurs. Therefore, if the gettering operation is carried out prior to the formation of the circuit wiring, the heavy metal impurities can effectively be removed.
The existing method described above is a process assuming the use of relatively high temperature heat-resistant materials, such as polycide as the bit line and the nitride film as the capacitor dielectric film of the capacitor. Thus, the existing method does not envisage a low-temperature process which will be essential in the future.
In the field of LSI, development is continuously made of miniaturization of a device and a highly-integrated structure. For a DRAM or a embedded DRAM semiconductor device, it is proposed to use a metal such as tungsten as the bit line (metal bit line) and to adopt a capacitor having a MIM (Metal-Insulator-Metal) structure in which a metal such as ruthenium is used as the capacitor storage electrode film and the capacitor plate electrode.
In a process for manufacturing the semiconductor device of the above-mentioned structure, a heat treatment temperature as a process temperature applied in each of the manufacturing steps after the formation of the bit line or the capacitor must be limited to a temperature lower than that presently used of about 800xc2x0 C., in order to reduce a metal contact resistance and a capacitor film leakage current.
However, a lower process temperature is associated with a lower heat treatment temperature to be applied in the gettering operation. This means that the emission and the diffusion of the heavy metal impurities during the gettering operation are difficult to occur.
Thus, in the method of manufacturing the semiconductor device with a lower process temperature, the gettering operation can not efficiently be carried out. This makes it difficult to remove the heavy metal impurities from the device active region.
It is therefore an object of this invention to provide a method of manufacturing a semiconductor device, such as a DRAM, having a metal bit line or a capacitor of a MIM structure, which is capable of efficiently carrying out a gettering operation without complicating a manufacturing process.
According to this invention, there is provided a method of manufacturing a semiconductor device, including a gettering operation of removing heavy metal impurities unintentionally introduced into a wafer in a manufacturing process, the method comprising the steps of:
preliminarily forming a gettering layer for capturing the heavy metal impurities on a wafer back surface opposite to a device active region;
carrying out, immediately before formation of a metal wiring layer, first heat treatment upon the semiconductor device at a predetermined temperature so that the heavy metal impurities are heat-diffused and captured in the gettering layer; and
removing, before a second heat treatment following the first heat treatment, the gettering layer with the heavy metal impurities captured therein.
After the gettering layer is removed, a first amorphous silicon layer is deposited on a wafer device surface including the device active region to serve as a filler for filling a contact hole formed in an interlayer insulator film to connect the metal wiring layer with an element formed in the device active region. A second amorphous silicon layer having an impurity concentration equal to that of the first amorphous silicon layer is simultaneously deposited on the wafer back surface.
Preferably, an impurity contained in each of the first and the second amorphous silicon layers is phosphorus. The impurity concentration preferably falls within a range between 1xc3x971019/cm3 and 5xc3x971020/cm3.
The gettering layer is a phosphorus diffusion layer or a PBS layer in which polysilicon is deposited.
In the above-mentioned method of manufacturing the semiconductor device, the semiconductor device is subjected to the first heat treatment at the predetermined temperature immediately before formation of the metal wiring layer so that the heavy metal impurities are heat-diffused and captured in the gettering layer preliminarily formed on the wafer back surface. The gettering layer with the heavy metal impurities captured therein is removed before the second heat treatment following the first heat treatment. It is thus possible to prevent re-emission or re-diffusion of the heavy metal impurities.
After removing the gettering layer, the first amorphous silicon layer is deposited on the water device surface including the device active region to serve as the filler for filling the contact hole formed in the interlayer insulator film to connect the metal wiring layer and the element formed in the device active region. The second amorphous silicon layer having the impurity concentration equal to that of the first amorphous silicon layer is simultaneously deposited on the wafer back surface. Thus, the second amorphous silicon layer acts as another gettering layer for removing heavy metal impurities in subsequent steps after removing the gettering layer.